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<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle">
<div class="title">cy_stc_tcpwm_shiftreg_config_t Struct Reference<div class="ingroups"><a class="el" href="group__group__tcpwm.html">TCPWM        (Timer Counter PWM)</a> &raquo; <a class="el" href="group__group__tcpwm__shiftreg.html">Shift Register (TCPWM)</a> &raquo; <a class="el" href="group__group__tcpwm__data__structures__shiftreg.html">Data Structures</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><p>Shift Register configuration structure. </p>
</div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a09a0fa05b9b04caa6853949c7d004a9b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a09a0fa05b9b04caa6853949c7d004a9b">clockPrescaler</a></td></tr>
<tr class="memdesc:a09a0fa05b9b04caa6853949c7d004a9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the clock prescaler inside the TCWPM block.  <a href="#a09a0fa05b9b04caa6853949c7d004a9b">More...</a><br /></td></tr>
<tr class="separator:a09a0fa05b9b04caa6853949c7d004a9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a803c6305495f76fa4215fc50c06e68e8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a803c6305495f76fa4215fc50c06e68e8">tapsEnabled</a></td></tr>
<tr class="memdesc:a803c6305495f76fa4215fc50c06e68e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">In shift register this sets the enabled taps.  <a href="#a803c6305495f76fa4215fc50c06e68e8">More...</a><br /></td></tr>
<tr class="separator:a803c6305495f76fa4215fc50c06e68e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a246b6b86b3d503819d9dfa4e442bedf3"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a246b6b86b3d503819d9dfa4e442bedf3">compare0</a></td></tr>
<tr class="memdesc:a246b6b86b3d503819d9dfa4e442bedf3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the value for Compare 0.  <a href="#a246b6b86b3d503819d9dfa4e442bedf3">More...</a><br /></td></tr>
<tr class="separator:a246b6b86b3d503819d9dfa4e442bedf3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad91b232fe66a30cb5289fd1ec391d2eb"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#ad91b232fe66a30cb5289fd1ec391d2eb">compareBuf0</a></td></tr>
<tr class="memdesc:ad91b232fe66a30cb5289fd1ec391d2eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the value for the buffered Compare 0.  <a href="#ad91b232fe66a30cb5289fd1ec391d2eb">More...</a><br /></td></tr>
<tr class="separator:ad91b232fe66a30cb5289fd1ec391d2eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72cf5641fbd233221a67118edec8c82e"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a72cf5641fbd233221a67118edec8c82e">enableCompare0Swap</a></td></tr>
<tr class="memdesc:a72cf5641fbd233221a67118edec8c82e"><td class="mdescLeft">&#160;</td><td class="mdescRight">If enabled, the compare 0 values are swapped on the terminal count.  <a href="#a72cf5641fbd233221a67118edec8c82e">More...</a><br /></td></tr>
<tr class="separator:a72cf5641fbd233221a67118edec8c82e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9c012dbae5c48930acd65fe89b9f9f4b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a9c012dbae5c48930acd65fe89b9f9f4b">compare1</a></td></tr>
<tr class="memdesc:a9c012dbae5c48930acd65fe89b9f9f4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the value for Compare 1.  <a href="#a9c012dbae5c48930acd65fe89b9f9f4b">More...</a><br /></td></tr>
<tr class="separator:a9c012dbae5c48930acd65fe89b9f9f4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a284ec593b9ef1d4d8a8a9cb8f3afa476"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a284ec593b9ef1d4d8a8a9cb8f3afa476">compareBuf1</a></td></tr>
<tr class="memdesc:a284ec593b9ef1d4d8a8a9cb8f3afa476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the value for the buffered Compare 1.  <a href="#a284ec593b9ef1d4d8a8a9cb8f3afa476">More...</a><br /></td></tr>
<tr class="separator:a284ec593b9ef1d4d8a8a9cb8f3afa476"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8f0fc0dca3c167b217b13ff11dd507b3"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a8f0fc0dca3c167b217b13ff11dd507b3">enableCompare1Swap</a></td></tr>
<tr class="memdesc:a8f0fc0dca3c167b217b13ff11dd507b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">If enabled, the compare1 values are swapped on the terminal count.  <a href="#a8f0fc0dca3c167b217b13ff11dd507b3">More...</a><br /></td></tr>
<tr class="separator:a8f0fc0dca3c167b217b13ff11dd507b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a86e389cc35d7897f918ad4b1b5fe6d21"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a86e389cc35d7897f918ad4b1b5fe6d21">interruptSources</a></td></tr>
<tr class="memdesc:a86e389cc35d7897f918ad4b1b5fe6d21"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables an interrupt on the terminal count, capture or compare.  <a href="#a86e389cc35d7897f918ad4b1b5fe6d21">More...</a><br /></td></tr>
<tr class="separator:a86e389cc35d7897f918ad4b1b5fe6d21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5006be6167088f58835b71e81e053ec0"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a5006be6167088f58835b71e81e053ec0">invertShiftRegOut</a></td></tr>
<tr class="memdesc:a5006be6167088f58835b71e81e053ec0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverts the ShiftReg output.  <a href="#a5006be6167088f58835b71e81e053ec0">More...</a><br /></td></tr>
<tr class="separator:a5006be6167088f58835b71e81e053ec0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac90567d8cdd6553d9ff3d53d492cfce4"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#ac90567d8cdd6553d9ff3d53d492cfce4">invertShiftRegOutN</a></td></tr>
<tr class="memdesc:ac90567d8cdd6553d9ff3d53d492cfce4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverts the ShiftReg compliment output.  <a href="#ac90567d8cdd6553d9ff3d53d492cfce4">More...</a><br /></td></tr>
<tr class="separator:ac90567d8cdd6553d9ff3d53d492cfce4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa755df2b8e33b4570b15807d35d09328"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#aa755df2b8e33b4570b15807d35d09328">reloadInputMode</a></td></tr>
<tr class="memdesc:aa755df2b8e33b4570b15807d35d09328"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures how the reload input behaves.  <a href="#aa755df2b8e33b4570b15807d35d09328">More...</a><br /></td></tr>
<tr class="separator:aa755df2b8e33b4570b15807d35d09328"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a544930bb80877350ee1d3340fbf16b52"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a544930bb80877350ee1d3340fbf16b52">reloadInput</a></td></tr>
<tr class="memdesc:a544930bb80877350ee1d3340fbf16b52"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects which input the reload uses.  <a href="#a544930bb80877350ee1d3340fbf16b52">More...</a><br /></td></tr>
<tr class="separator:a544930bb80877350ee1d3340fbf16b52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7967565f53758c555681b49b08d5dc21"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a7967565f53758c555681b49b08d5dc21">startInputMode</a></td></tr>
<tr class="memdesc:a7967565f53758c555681b49b08d5dc21"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures how the start input behaves.  <a href="#a7967565f53758c555681b49b08d5dc21">More...</a><br /></td></tr>
<tr class="separator:a7967565f53758c555681b49b08d5dc21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab31c0afc07c0356a69b0993e58a2577f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#ab31c0afc07c0356a69b0993e58a2577f">startInput</a></td></tr>
<tr class="memdesc:ab31c0afc07c0356a69b0993e58a2577f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects which input the start uses.  <a href="#ab31c0afc07c0356a69b0993e58a2577f">More...</a><br /></td></tr>
<tr class="separator:ab31c0afc07c0356a69b0993e58a2577f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5959e389e5949d4699130fa8c3638c5"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#af5959e389e5949d4699130fa8c3638c5">killInputMode</a></td></tr>
<tr class="memdesc:af5959e389e5949d4699130fa8c3638c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures how the kill0 input behaves.  <a href="#af5959e389e5949d4699130fa8c3638c5">More...</a><br /></td></tr>
<tr class="separator:af5959e389e5949d4699130fa8c3638c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5eb30a1227023915579e56718dc38e08"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a5eb30a1227023915579e56718dc38e08">killInput</a></td></tr>
<tr class="memdesc:a5eb30a1227023915579e56718dc38e08"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects which input the kill0 uses.  <a href="#a5eb30a1227023915579e56718dc38e08">More...</a><br /></td></tr>
<tr class="separator:a5eb30a1227023915579e56718dc38e08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4874f2720f10841ecbff753faec35004"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a4874f2720f10841ecbff753faec35004">shiftInputMode</a></td></tr>
<tr class="memdesc:a4874f2720f10841ecbff753faec35004"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures how the shift input behaves.  <a href="#a4874f2720f10841ecbff753faec35004">More...</a><br /></td></tr>
<tr class="separator:a4874f2720f10841ecbff753faec35004"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af8adc6278c22029d5f223ff5ef31b469"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#af8adc6278c22029d5f223ff5ef31b469">shiftInput</a></td></tr>
<tr class="memdesc:af8adc6278c22029d5f223ff5ef31b469"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects which input the shift uses.  <a href="#af8adc6278c22029d5f223ff5ef31b469">More...</a><br /></td></tr>
<tr class="separator:af8adc6278c22029d5f223ff5ef31b469"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab80c79ccae10032aae7f61de48480954"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#ab80c79ccae10032aae7f61de48480954">serialInputMode</a></td></tr>
<tr class="memdesc:ab80c79ccae10032aae7f61de48480954"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures how the serial input behaves.  <a href="#ab80c79ccae10032aae7f61de48480954">More...</a><br /></td></tr>
<tr class="separator:ab80c79ccae10032aae7f61de48480954"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6e62ef95e493e3b059df4c434e6ee3ea"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a6e62ef95e493e3b059df4c434e6ee3ea">serialInput</a></td></tr>
<tr class="memdesc:a6e62ef95e493e3b059df4c434e6ee3ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects which input the serial uses.  <a href="#a6e62ef95e493e3b059df4c434e6ee3ea">More...</a><br /></td></tr>
<tr class="separator:a6e62ef95e493e3b059df4c434e6ee3ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9af39713abe383b8bfbd775521aa306"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#ac9af39713abe383b8bfbd775521aa306">shiftRegOnDisable</a></td></tr>
<tr class="memdesc:ac9af39713abe383b8bfbd775521aa306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specifies the behavior of the ShiftReg outputs line_out and line_compl_out while the Shift Register is disabled.  <a href="#ac9af39713abe383b8bfbd775521aa306">More...</a><br /></td></tr>
<tr class="separator:ac9af39713abe383b8bfbd775521aa306"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a65b35248a6057c8854ae8224fa86d2d5"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a65b35248a6057c8854ae8224fa86d2d5">trigger0Event</a></td></tr>
<tr class="memdesc:a65b35248a6057c8854ae8224fa86d2d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures which internal event generates on output trigger 0.  <a href="#a65b35248a6057c8854ae8224fa86d2d5">More...</a><br /></td></tr>
<tr class="separator:a65b35248a6057c8854ae8224fa86d2d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abc1393e7d297b432cd42259c3cf2b350"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#abc1393e7d297b432cd42259c3cf2b350">trigger1Event</a></td></tr>
<tr class="memdesc:abc1393e7d297b432cd42259c3cf2b350"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures which internal event generates on output trigger 1.  <a href="#abc1393e7d297b432cd42259c3cf2b350">More...</a><br /></td></tr>
<tr class="separator:abc1393e7d297b432cd42259c3cf2b350"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4feefe964695a6527ab32cefcf38d60c"><td class="memItemLeft" align="right" valign="top"><a id="a4feefe964695a6527ab32cefcf38d60c"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__shiftreg__config__t.html#a4feefe964695a6527ab32cefcf38d60c">buffer_swap_enable</a></td></tr>
<tr class="memdesc:a4feefe964695a6527ab32cefcf38d60c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures swapping mechanism between CC0 and buffered CC0, CC1 and buffered CC1, PERIOD and buffered PERIOD, DT and buffered DT. <br /></td></tr>
<tr class="separator:a4feefe964695a6527ab32cefcf38d60c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Field Documentation</h2>
<a id="a09a0fa05b9b04caa6853949c7d004a9b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a09a0fa05b9b04caa6853949c7d004a9b">&#9670;&nbsp;</a></span>clockPrescaler</h2>

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          <td class="memname">uint32_t cy_stc_tcpwm_shiftreg_config_t::clockPrescaler</td>
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<p>Sets the clock prescaler inside the TCWPM block. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a803c6305495f76fa4215fc50c06e68e8">&#9670;&nbsp;</a></span>tapsEnabled</h2>

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<p>In shift register this sets the enabled taps. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a246b6b86b3d503819d9dfa4e442bedf3">&#9670;&nbsp;</a></span>compare0</h2>

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<p>Sets the value for Compare 0. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ad91b232fe66a30cb5289fd1ec391d2eb">&#9670;&nbsp;</a></span>compareBuf0</h2>

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<p>Sets the value for the buffered Compare 0. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a72cf5641fbd233221a67118edec8c82e">&#9670;&nbsp;</a></span>enableCompare0Swap</h2>

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<p>If enabled, the compare 0 values are swapped on the terminal count. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a9c012dbae5c48930acd65fe89b9f9f4b">&#9670;&nbsp;</a></span>compare1</h2>

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<p>Sets the value for Compare 1. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a284ec593b9ef1d4d8a8a9cb8f3afa476">&#9670;&nbsp;</a></span>compareBuf1</h2>

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<p>Sets the value for the buffered Compare 1. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a8f0fc0dca3c167b217b13ff11dd507b3">&#9670;&nbsp;</a></span>enableCompare1Swap</h2>

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<p>If enabled, the compare1 values are swapped on the terminal count. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a86e389cc35d7897f918ad4b1b5fe6d21">&#9670;&nbsp;</a></span>interruptSources</h2>

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<p>Enables an interrupt on the terminal count, capture or compare. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a5006be6167088f58835b71e81e053ec0">&#9670;&nbsp;</a></span>invertShiftRegOut</h2>

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<p>Inverts the ShiftReg output. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ac90567d8cdd6553d9ff3d53d492cfce4">&#9670;&nbsp;</a></span>invertShiftRegOutN</h2>

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<p>Inverts the ShiftReg compliment output. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#aa755df2b8e33b4570b15807d35d09328">&#9670;&nbsp;</a></span>reloadInputMode</h2>

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<p>Configures how the reload input behaves. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a544930bb80877350ee1d3340fbf16b52">&#9670;&nbsp;</a></span>reloadInput</h2>

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<p>Selects which input the reload uses. </p>
<p>The inputs are device-specific. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a7967565f53758c555681b49b08d5dc21">&#9670;&nbsp;</a></span>startInputMode</h2>

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<p>Configures how the start input behaves. </p>
<p>See <a class="el" href="group__group__tcpwm__input__modes.html">Input Modes</a>. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ab31c0afc07c0356a69b0993e58a2577f">&#9670;&nbsp;</a></span>startInput</h2>

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<p>Selects which input the start uses. </p>
<p>The inputs are device-specific. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#af5959e389e5949d4699130fa8c3638c5">&#9670;&nbsp;</a></span>killInputMode</h2>

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<p>Configures how the kill0 input behaves. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a5eb30a1227023915579e56718dc38e08">&#9670;&nbsp;</a></span>killInput</h2>

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<p>Selects which input the kill0 uses. </p>
<p>The inputs are device-specific. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a4874f2720f10841ecbff753faec35004">&#9670;&nbsp;</a></span>shiftInputMode</h2>

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<p>Configures how the shift input behaves. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#af8adc6278c22029d5f223ff5ef31b469">&#9670;&nbsp;</a></span>shiftInput</h2>

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<p>Selects which input the shift uses. </p>
<p>The inputs are device-specific. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ab80c79ccae10032aae7f61de48480954">&#9670;&nbsp;</a></span>serialInputMode</h2>

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<p>Configures how the serial input behaves. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a6e62ef95e493e3b059df4c434e6ee3ea">&#9670;&nbsp;</a></span>serialInput</h2>

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<p>Selects which input the serial uses. </p>
<p>Inputs are device-specific. </p>

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<a id="ac9af39713abe383b8bfbd775521aa306"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac9af39713abe383b8bfbd775521aa306">&#9670;&nbsp;</a></span>shiftRegOnDisable</h2>

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<p>Specifies the behavior of the ShiftReg outputs line_out and line_compl_out while the Shift Register is disabled. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a65b35248a6057c8854ae8224fa86d2d5">&#9670;&nbsp;</a></span>trigger0Event</h2>

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<p>Configures which internal event generates on output trigger 0. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#abc1393e7d297b432cd42259c3cf2b350">&#9670;&nbsp;</a></span>trigger1Event</h2>

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<p>Configures which internal event generates on output trigger 1. </p>

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